Interleaving Memory - What Is, or Was, It?
Interleaving, Why is Was Cool,
Why It's
Gone, and Bertha's Take...
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What? You thought you were going learn something useful about interleaving.! Well sorry, unfortunately understanding it has been way down on the priority list, and it was such a short lived attribute of Macs that I never looked into it much.
However, in the interest of propagation of errors here is what little I know (or might know) about interleaving.
First a little background information
Most (all) modern computers experience a bottleneck when the CPU accessing memory (or most other things). In the new systems it is caused by the dramatically slower motherboard and memory when compared with the processor speeds forcing the CPU to wait on the memory and pauses and another chance to read or write from it. This is what the caches (CPU, L1, L2, backside, etc) address and why bigger/faster caches are better.
Older systems like the PM8500 also had the CPU/motherboard speed mismatch problem plus had memory that was itself slower than even the motherboard. As a result the PM8500 had to contend with a main bus slower than the CPU and memory refesh rates slower than the main bus resulting in two possible delays. Newer systems have only to contend with memory that is slower than the CPU, but at least as fast and often faster then the main bus (DDR memory for example). It is this problem of RAM slower than the bus it is connnected to that interleaving seemed to try to address.
My Understanding of Interleaving
Interleaving
at its simplest can be regarding as the ability of the computer to
mesh two adjacent DIMMS (RAM chips) together to effectively double the
memory bus width from 64 bit to
128 bits. To function interleaving
required meshed DIMMS be closely matched in spec which often meant
memory
bought at least in pairs.
Technically it seems that interleaving (meshing the memory) allowed the next logical memory address to accessed from one paired DIMM while the just read other paired DIMM refeshes (refreshing is the state for the DIMM recovering so it can be accessed again). In other words interleaving allowed the DIMMS to be meshed such that sequential memory addresses alternated back and forth between two paried chips so that for sequential reads you could essentially double the bandwidth. This was often of great value since a large percentage of the CPU's time is spent simply move sequential chunks of memory around.
Obviously
interleaving is not helpful in newer computers
where
memory
refreshes at least as fast as the motherboard can cycle.
Yea, as regards the PM8500 project "Bertha" there were real questions about whether OS X could handle interleaved memory and with that worry I intially carefully disabled it (by putting RAM chips of different sizes and make in "paired" slots). Newer reports suggest significant improvement, which is not surprising since memory bandwidth is a weak area and any change with the possibility of doubling memory bandwidth is likely to be helpful. Upon enabling it (by using matched DIMMS) I did see a measurable and appreciable performance boost after interleaving and it is the PM8500 normal state. I really don't have a choice since all eight of my 128 DIMMS are matched!
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Created 4/19/04
Modifed 5/20/05 - Nvu, content update